FIELD: automatics, pulse equipment. SUBSTANCE: timer is intended for formation of operate command in certain time interval set by code prior to start of timer. Timer monitors single failures in counter circuit (nonsetting of stage flip-flops in initial condition, failures of logic circuits, type "logic O" and "logic I", failures of storage elements). Device is insensitive to errors in code units when recording by value of plus 2, minus 1 pulse. It also detects errors in code units by value plus 3-8, minus 2-5 pulses in case of recording (under nominal values in center of insensibility zone). Device makes it possible to read, test and fulfil multiply task set one time. Increased authenticity of monitoring is achieved by insertion of OR gate 4, pulse formers 14, 15, AND gates 16, 17, delay element 5, storage unit 19. EFFECT: increased authenticity of monitoring. 2 dwg, 1 tbl
Title | Year | Author | Number |
---|---|---|---|
CONTROLLED TIMER | 1990 |
|
RU2037872C1 |
SELF-CHECK TIMER | 1991 |
|
SU1832976A1 |
CHECK-UP TIMER | 1991 |
|
SU1769611A1 |
SELF-TEST TIMER | 1995 |
|
RU2113007C1 |
PROGRAM TIMER | 2001 |
|
RU2215367C2 |
FREQUENCY DIVIDER WITH PROGRAMMED COUNT-DOWN RATIO | 0 |
|
SU1649659A1 |
CONTROL DEVICE FOR HELIOSTAT | 0 |
|
SU1291925A1 |
DIGITAL SERVO ELECTRIC DRIVE | 0 |
|
SU1308982A1 |
MICROPROGRAM CONTROL DEVICE | 1993 |
|
RU2079876C1 |
SHAPER OF PULSE SEQUENCES FOR CHECKING BUBBLE MEMORY DOMAINS | 0 |
|
SU1513514A1 |
Authors
Dates
1994-11-15—Published
1986-04-07—Filed