FIELD: automatic control and pulse technique. SUBSTANCE: self-check timer has NAND gates 4-6, pulse shapers 7-9, OR gates 10,11, NOR gates 12,13, NOT gates 14,15, master oscillator 16, frequency divider 17, pulse counter 18, storage unit 19, switches 20-23, flip-flop 24, modulo two adder 25, and delay element 26. EFFECT: improved speed in setting and its check-up modes. 4 dwg
| Title | Year | Author | Number |
|---|---|---|---|
| TIMER WITH MONITORING | 1986 |
|
SU1505257A1 |
| SELF-TEST TIMER | 1995 |
|
RU2113007C1 |
| PROGRAMMABLE MULTICHANNEL CODE-TO-PHASE CONVERTER | 0 |
|
SU1742998A1 |
| DIGITAL PHASOMETER | 0 |
|
SU1688189A1 |
| CONTROLLED TIMER | 1990 |
|
RU2037872C1 |
| CHECK-UP TIMER | 1991 |
|
SU1769611A1 |
| MULTICHANNEL PROGRAMMED DRIVER | 0 |
|
SU1383297A1 |
| DEVICE FOR CALCULATING MICROPROCESSOR SYSTEM TIME INTERVALS | 0 |
|
SU960781A1 |
| SHAPER OF PULSE SEQUENCES FOR CHECKING BUBBLE MEMORY DOMAINS | 0 |
|
SU1513514A1 |
| SIGNAL DELAY DEVICE | 1992 |
|
RU2024186C1 |
Authors
Dates
1995-10-27—Published
1991-04-04—Filed