FIELD: automatic control and pulse technique. SUBSTANCE: timer has first and second mode setting inputs 1 and 2, respectively, timer initial setting input 3, first and second pulse shapers 4 and 5, first and second NAND gates 6 and 7, clock generator 8, frequency divider 9, counter 10 having more and less significant bits stages 11 and 12, respectively, counter 13, comparison unit 14, timer data output 15, checkup output 16. Timer circuit can dispense with storage unit having energy-independent components (such as magnetic cores and the like) due to new organization of check-up of desired setting code. EFFECT: reduced hardware expenses for timer. 1 dwg
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Authors
Dates
1995-01-09—Published
1991-01-31—Filed