FIELD: computer engineering. SUBSTANCE: system has processor unit, buffer data storage, buffer instruction storage, data flag storage, read-only storage, buffer storage control device, system storage. Proposed computing system built around architecture using reduced set of hardware-implemented simple instructions harnesses most of exclusive situations without interruption of processor unit and exit to operating system procedures. This is effected due to transfer to such mode in which instructions are taken not from buffer instruction storage but from read-only storage unit and from read-only storage. Exclusive situations are such as processing of different-format and different-type operands. Data on type and format is stored in operand tag bits and enable automatic determination of operation algorithm. EFFECT: improved speed and reliability due to monitoring of operand type and format during processor translation. 19 dwg
Title | Year | Author | Number |
---|---|---|---|
BUFFER MEMORY CONTROL UNIT | 1990 |
|
RU2010317C1 |
PIPELINE PROCESSOR UNIT | 1992 |
|
RU2032215C1 |
MEMORY CONTROL UNIT | 1991 |
|
RU2010318C1 |
CENTRAL PROCESSOR | 0 |
|
SU1804645A3 |
SUBROUTINE CALL UNIT | 1990 |
|
RU2009538C1 |
ADDER | 1991 |
|
RU2006915C1 |
DEVICE FOR EXPONENT MATCHING OF OPERANDS | 1992 |
|
RU2006910C1 |
DEVICE FOR NORMALIZING AND ROUNDING OFF REAL NUMBERS | 1992 |
|
RU2018921C1 |
COMPUTING UNIT | 1992 |
|
RU2035064C1 |
ASSOCIATIVE OPTICAL MULTICHANNEL CORRELATOR | 1992 |
|
RU2037187C1 |
Authors
Dates
1995-02-09—Published
1989-12-29—Filed