FIELD: computer engineering. SUBSTANCE: device has two inversion units, adder, decoder, shift register, mask generation unit, logical unit, control unit, control gate, generator of result signals, interrupt generator, output commutator, output register. Three input commutators, generator of time strobes, comparison unit, two shift signal generators, generator of sign and digits of fraction, seven commutators, two registers, additional output commutator, generator of result sign, generator of end-of- operations signal, additional inversion unit, additional adder, generator of values for rough shift, generator of values for precise shift are introduced to accomplish the goal of invention. This results in possibility of hardware implementation of operations of multiplication, division, counting. In addition units inversion unit, adder, shift register and logical unit has 64 bits. EFFECT: increased speed, increased precision, increased functional capabilities. 6 dwg, 3 tbl
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Authors
Dates
1995-05-10—Published
1992-12-30—Filed