FIELD: semiconductor microelectronics. SUBSTANCE: element has two high-alloyed regions of n- and p-type semiconductor material. These regions are isolated by two low-alloyed regions of p- and n-type semiconductor material. Protective insulating layers are applied to high-alloyed regions. Ports are provided in protective layers for ohmic contacts to high-alloyed regions. Width of each low-alloyed region is twice or thrice as high as maximum diffusion lengths of minority charge carriers injected from adjacent high-alloyed regions. EFFECT: improved design. 1 dwg
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Authors
Dates
1995-03-10—Published
1992-10-16—Filed