UNIT OF MATRIX COMMUTATOR Russian patent published in 1998 - IPC

Abstract RU 2110831 C1

FIELD: computer engineering, in particular, commutation of computer systems with multiple processors. SUBSTANCE: each unit for handling message queues has first to third units for handling message queues, register of unit identifier, unit for analysis of message queues, multiplexer, register, demultiplexer, flip-flop, synchronization unit, first and second comparison circuits, first and second decoders, AND gate. In addition device has first to (K-1)-th registers, demultiplexer, first and second groups of first to K-th AND gates, group of first to K-th OR gates, queue length register, first and second AND gates, NOT gate and first OR gate. Goal of invention is achieved by introduced univibrator, flip-flops for request, locking and control of demultiplexer, third AND gate and second OR gate. EFFECT: increased reliability of operations. 2 cl, 4 dwg, 1 tbl

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RU 2 110 831 C1

Authors

Zotov I.V.

Koloskov V.A.

Titov V.S.

Dates

1998-05-10Published

1996-04-24Filed