FIELD: computer engineering; switching facilities for multiprocessor computing and control systems. SUBSTANCE: switching network module has module identifier register, message queue analyzing unit, multiplexer, register, demultiplexer, flip- flop, synchronizing unit, first and second comparison gates, first and second decoders, AND gate, and first through third message queue organizing units each incorporating k registers, where k is maximal length of message queue, k 1 AND-gate units, group of k AND gates, group of k OR gates, AND gate, OR gate, and delay circuit. Novelty is that newly introduced in each message queue organizing unit are AND- gate unit, group of k NOR gates, and NAND gate for optimizing a priori sophisticated message queue organizing unit. EFFECT: enlarged functional capabilities. 5 dwg
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Authors
Dates
2001-10-20—Published
2000-05-25—Filed