METHOD AND DEVICE FOR PHASE LOCKING Russian patent published in 2001 - IPC

Abstract RU 2176430 C2

FIELD: electronic engineering. SUBSTANCE: method involves reading digital sinusoidal signal Sd saved in memory unit 3. Input signal Sr (analog sinusoidal signal) is delivered to input lead 1. Sa signal produced as a result of analog-to-digital conversion of Sd signal is read from memory unit 3. The signals are compared in phase with comparison circuit 2. Digital sinusoidal signal Sd read to output lead 6 is synchronized with analog Sa signal phase coming to input lead 1 by controlling signal read from memory unit. Control is carried out by means of address generator 5 using detected phase error signal. EFFECT: improved stability characteristics. 3 cl, 8 dwg

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RU 2 176 430 C2

Authors

Mogi Jasukhide

Jamauti Etsuro

Dates

2001-11-27Published

1996-04-19Filed