METHOD FOR INSULATING INTEGRATED-CIRCUIT COMPONENTS Russian patent published in 2003 - IPC

FIELD: manufacture of submicron-size silicon integrated circuits. SUBSTANCE: latent dielectric layer of insulation bottom part is formed by thermal oxidation of silicon with layer incorporating radiation defects produced in silicon in advance. To this end use is made of method for implanting accelerated ions of elements which do not produce doping donors or acceptors of 50-200 keV at dose rate of 1•10¹⁶-1•10¹⁷ cm^-2 and temperatures of 500-850 C in silicon. Masking layer of silicon nitride is produced with ports spaced apart through maximum L, this length being found from formula where D is oxygen ratio at thermal oxidation of silicon on mentioned silicon layer incorporating radiation defects; t is oxidation time. EFFECT: reduced unsoundness of insulating areas; facilitated manufacture of integrated circuits. 5 cl, 7 dwg