FIELD: interfacing very large-scale integrated circuits for block-by-block signal transfer.
SUBSTANCE: direct and inverted output signals are excited in transmitting integrated circuit system. For comparing asymmetric signals of equal maximal speed pickup, oscillatory reference synchronous-voltage signals and clock pulses as well as inverted ones are switched over during signal transfer from one state to other. Each receiving device incorporates two comparators for reference synchronous-voltage signals and clock pulses as well as for inverted ones, and signal binary value dictates connection of respective comparator to receiving device output. This comparator functions to find out if there is change in binary value of signal until reference synchronous-voltage signals and clock pulses as well as inverted ones change their binary value. If transfer is OK, this comparator keeps functioning, otherwise it is disconnected.
EFFECT: reduced power requirement.
104 cl, 35 dwg
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Authors
Dates
2004-11-10—Published
1999-03-08—Filed