PARA-PHASE LOGICAL ELEMENT BASED ON SHORT-CHANNEL MIS TRANSISTORS Russian patent published in 2005 - IPC

FIELD: computer science.

SUBSTANCE: device has RS trigger 1, pre-charge transistors 4 and 5 of p-type, clock transistor 6 of n-type, through transistors 7 and 8 of n-type and logical block 9, containing direct and inverse key circuits on transistors 10-15 of n-type. Latches of pre-charge transistors 4,5 and clock transistor 6 are connected to clock bus 16. first outputs of direct and inverse key circuits through clock transistor 6 are connected to common bus 17. second outputs of direct and inverse key circuits are connected directly to direct 18 and inverse 19 outputs of block 9. first inputs of elements 2AND-NOT 2,3 are check connection inputs of RS trigger 1 and concurrently outputs 20, 21 of device. Second inputs 22,24 through pre-charge transistors 4 or 5 of same name are connected to power bus 23, and via through transistors 7 or 8 of same name - respectively to direct 18 or inverse 19 outputs of block 9. latches of through transistors 7 and 8 are connected to outputs 21 and 20 of device. To inputs 25-28 para-phase signals of variables are sent so, that only one key circuit of logical block 9 is closed.

EFFECT: higher efficiency.

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