CLOCKED LOGICAL ELEMENT AND-OR ON CMDS-TRANSISTORS Russian patent published in 2009 - IPC H03K19/01 

FIELD: physics, computer engineering.

SUBSTANCE: invention is related to the field of computer engineering and may be used in CMDS integrated circuits in realisation of logical devices. Clocked logical element AND-OR on CMDS-transistors comprises pre-charge transistors of (1) p-type and (2) n-type, clock transistors (3) of p-type and (4) n-type, logical transistor (5) of p-type and logical unit (6), which includes key circuits (7-8) made on serially connected transistors of n-type, gates of which are connected to logical inputs (9) of device, and which are connected parallel between output (12) of logical unit (6) and clock bus (13). Pre-charge transistor (2) of n-type and pre-charge transistor of 1) p-type, gate of which is connected to output (10) of device, are connected between supply bus (11) and output (12). Clock transistor (4) of n-type is connected between output (10) of device and earth bus (14). Gates of pre-charge transistor (2) of n-type, clock transistor (4) of n-type and clock transistor of (3) p-type are connected to clock bus (13). Logical transistor (5) of p-type, gate of which is connected to output (12) of logical unit (6), is connected serially with clock transistor (3) of p-type between output (10) of device and supply bus (11).

EFFECT: lower consumed power of device.

1 dwg