FIELD: electrical engineering.
SUBSTANCE: logical element comprises two p-type transistors, first clock n-type transistor and logical unit. The latter comprises direct and inverse switch circuits composed of serially connected logical n-type transistors. Gates of the latter are connected to paraphrase logical inputs of the device so that only one switch circuit is normally closed while all others are normally open. First outputs of switch circuits are connected to the device direct output while first outputs of inverse switch circuits are connected to the device inverse output. First and second p-type transistors are connected in between feed bus and direct and inverse outputs of the device. Gates of said p-type transistors are connected to the device direct and inverse outputs. Second outputs of direct switch circuits of logical unit are connected via first clock n-type transistor with its gate connected to clock bus to ground bus. Besides, this device incorporates second clock n-type transistor. Gate of the latter is connected to clock bus while second outputs of direct switch circuits of logical unit are connected via second clock n-type transistor with its gate connected to clock bus to ground bus.
EFFECT: decreased power consumed in one cycle.
1 dwg
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