FIELD: physics, communication.
SUBSTANCE: invention is related to telecommunications and may be used in receiving devices of synchronisation by cycles of discrete messages transmission system. Device comprises identifier of sync pulse, adder, unit of shift registers, resolver, shaper of sync pulses, counter of cycles, comparator, finder of synchronism loss threshold, unit of undistorted sync pulses permissible number selection, counter of distorted sync pulses, counter of total number of sync pulses, trigger, counter of clock pulses, element AND, unit of threshold selection, signal input, clock input and device output. Identifier of sync signal comprises shift register, detector of errors in sync group, shaper of response weight for sync signal. Resolver comprises the first comparator, memory unit, subtraction unit, the second comparator, counter of comparison, the second element AND, the third element AND, element OR. At that exit from synchronism condition is determined, when number of accumulated responses at position of true sync signal in another test cycle will be less than threshold of synchronism loss. At that in case of true distortion of synchronism in cells that correspond to position of true sync signal, there is drastic reduction of sync signal identifier responses accumulation density observed, which makes it possible to faster determine condition of system exit from synchronism, which in its turn makes it possible to reduce time required for synchronism restoration.
EFFECT: improved quick-action of device for cyclic synchronisation at high probability of erroneous reception of sync pulses.
1 dwg
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Authors
Dates
2009-02-27—Published
2007-05-28—Filed