FIELD: communication technology.
SUBSTANCE: invention relates to the field of telecommunications. For this purpose, a cyclic synchronization device is proposed, in which the search for a digital network or the restoration of synchronism by cycles is performed by summing at each position of the cycle not the responses of the synchro signal recognizer, but summing all symbols similar to synchro symbols of the synchro group, using full synchro information about each synchro symbol of the synchro group, true and false. An increase in the accuracy of estimating the probability of an error of the Poc synchro symbol is achieved by counting not the number of D distorted responses of the synchro signal recognizer during S cycles, but the number of D’ distorted synchro symbols of synchro groups during S’ cycles. The reduction of the digital network search time and the reduction of the probability of false triggering of the decisive node after the restoration of the communication channel in case of signal loss or relatively prolonged exposure to powerful interference is achieved by zeroing the memory block of the decisive node and the block of shift registers when any summation result is achieved at any of the N positions of the cycle of the permissible value.
EFFECT: reduction in the search time of the cyclic synchro signal of the digital network and an increase in the accuracy of its detection.
3 cl, 2 dwg
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Authors
Dates
2022-10-28—Published
2021-12-17—Filed