SELF-SYNCHRONISING SINGLE-STAGE D FLIP-FLOP WITH LOW ACTIVE LEVEL OF CONTROL SIGNAL Russian patent published in 2009 - IPC H03K3/00 

Abstract RU 2362267 C1

FIELD: computer engineering.

SUBSTANCE: invention relates to computer engineering and can be used in designing self-synchronising flip-flop, register and computing devices, digital information processing systems. The technical outcome of the invention is achieved due to that, in a circuit which contains a bistable cell, data input, control input, true and complementary outputs and an indicator output, there is also an AND-OR-NOT element and an inverter.

EFFECT: provision for self-synchronisation of a single-state D flip-flop with single-phase coding of the data input, low active level of control signal and paraphrase coding of the data output.

5 cl, 5 dwg

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RU 2 362 267 C1

Authors

Stepchenkov Jurij Afanas'Evich

D'Jachenko Jurij Georgievich

Rozhdestvenskij Jurij Vladimirovich

Filin Adol'F Vasil'Evich

Dates

2009-07-20Published

2007-11-12Filed