FIELD: information technology.
SUBSTANCE: invention relates to computer engineering and can be used in designing self-synchronising flip-flop, register and computer devices, digital information processing systems. This result is achieved by that, a circuit, which comprises three AND-OR-NOT elements, a data input, control input, true and complementary data outputs and indicator output, further contains one more AND-OR-NOT element, inverter, two OR-AND-NOT elements.
EFFECT: self-synchronising design of a two-cycle D flip-flop with low active control signal level, single-phase coding of the data input and paraphase coding of the data output.
8 cl, 8 dwg
| Title | Year | Author | Number |
|---|---|---|---|
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|
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|
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|
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|
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| SELF-SYNCHRONISING SINGLE-STAGE D FLIP-FLOP WITH LOW ACTIVE LEVEL OF CONTROL SIGNAL | 2007 |
|
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| SELF-SYNCHRONISING SINGLE-STAGE D FLIP-FLOP WITH HIGH ACTIVE LEVEL OF CONTROL SIGNAL | 2007 |
|
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| TWO-CYCLE SELF-CLOCKED RS FLIP-FLOP WITH PRESET AND CONTROL INPUT | 2008 |
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RU2319297C1 |
