FIELD: computer equipment.
SUBSTANCE: invention relates to pulse and computer equipment and can be used in construction of self-synchronizing trigger, register and computing devices, digital information processing systems. Combined indicator output in self-synchronous single-cycle D-flip-flop with zero spacer is converted into serial indicator output (output with memory). This conversion is realized by introducing an additional element NOT between the combination part of the indicator element and its external output and introduction of two additional links. First connection provides connection of a combination indicator output to additional trigger inputs (bistable cell). Second link provides connection of the additional element NOT to additional inputs of the indicator element, which transfers it from the combination class to the serial class.
EFFECT: technical result consists in acceleration of interaction of D-flip-flop with source of its information input due to reduction of time, during which state of information input of D-flip-flop should not change after appearance of high level at its control input.
1 cl, 4 dwg
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