COMPLEMENTARY DIFFERENTIAL AMPLIFIER WITH CONTROLLED GAIN Russian patent published in 2010 - IPC H03G3/30 H03F3/45 

FIELD: physics, radio.

SUBSTANCE: invention relates to radio engineering and communication and can be used in automatic gain devices, phase detectors and modulators, in phase-locked loop and frequency multiplication systems or as an amplifier whose voltage transfer ratio depends on the control signal level. The controlled amplifier and analogue multiplier are basic blocks of modern systems for receiving and processing high-frequency and microwave signals, and analogue computer and measurement equipment. The complementary differential amplifier (CDA) has a first differential stage (DS) with n-p-n transistors (1, 2), first current input (3), first (4) reference current source (RCS) and first (5) and second (6) current outputs of the first DS, a second DS on p-n-p transistors (T) (7, 8) with a second current input (9), second RCS (10), first (11) and second (12) current outputs of the second DS, first (13) and second (14) inputs of the CDA connected to corresponding bases of T (1, 7) and bases of T (2, 8), an output current adder (15) with first (16) and second (17) inputs matched with the bus of a positive power supply (PS) (18), as well as with first (19) and second (20) inputs matched with the bus of a negative PS (21). The system includes first (22) n-p-n and second (23) p-n-p additional T, whose bases are connected to the gain control circuit (24), the emitter of T (22) is connected to RCS (25) and through the first (26) auxiliary resistor to the current input (3) of the first DS, the emitter of T (23) is connected to RCS (27) and through the second (28) auxiliary resistor to the current input (9) of the second DS, where the first current output (5) of the first DS is connected to the first input (16) of the output current adder (15), the second current output (6) of the first DS is connected to the second input (17) of the output current adder (15), the first current output (11) of the second DS is connected to the second input (20) of the output current adder (15), and the second current output (12) of the second DS is connected to the first input (19) of the output current adder (15).

EFFECT: lower power supply voltage and electronic voltage gain control.

5 cl, 13 dwg