FIELD: physics, computer engineering.
SUBSTANCE: invention can be used in digital computer engineering and in computer processors and digital automation devices. The device contains in each bit, two RS flip flops, eight AND elements, four OR elements and four logic inverters.
EFFECT: faster operation.
2 cl, 1 dwg, 2 tbl
| Title | Year | Author | Number |
|---|---|---|---|
| METHOD AND DEVICE FOR ADDING AND SUBTRACTING BINARY DECIMAL CODE | 2008 |
|
RU2389064C1 |
| PULSE COUNTER | 2010 |
|
RU2419200C1 |
| BINARY CODED DECIMAL SUMMATION METHOD AND DEVICE | 2007 |
|
RU2402803C2 |
| METHOD AND DEVICE FOR SUBTRACTING BINARY CODES | 2010 |
|
RU2410746C1 |
| COMBINATIVE ACCUMULATING ADDER | 2005 |
|
RU2292073C1 |
| PULSE COUNTING METHOD AND DEVICE | 2013 |
|
RU2538949C1 |
| BINARY-CODED DECIMAL SUMMATION METHOD AND DEVICE | 2008 |
|
RU2395833C2 |
| METHOD AND APPARATUS FOR SUBTRACTING UNITS | 2014 |
|
RU2540787C1 |
| PULSE COUNTER | 2014 |
|
RU2551414C1 |
| DEVICE FOR ADDING BINARY CODES | 2008 |
|
RU2381547C2 |
