FIELD: information technology.
SUBSTANCE: each decimal digit of the device contains five bits, each containing two RS flip-flops, five AND logic elements, two OR logic elements, four digital inverters, each decimal digit also contains three AND logic elements, four OR logic elements, a number addition matrix, a single-bit three-input adder in the fifth bit.
EFFECT: faster summation and reduced expenses on equipment.
3 dwg, 2 tbl
| Title | Year | Author | Number |
|---|---|---|---|
| METHOD AND DEVICE FOR ADDING AND SUBTRACTING BINARY DECIMAL CODE | 2008 |
|
RU2389064C1 |
| BINARY CODED DECIMAL SUMMATION METHOD AND DEVICE | 2007 |
|
RU2402803C2 |
| METHOD AND DEVICE FOR BINARY-CODED DECIMAL MULTIPLICATION | 2008 |
|
RU2386998C1 |
| COMBINATIVE ACCUMULATING ADDER | 2005 |
|
RU2292073C1 |
| METHOD AND DEVICE FOR ADDING BINARY CODES | 2008 |
|
RU2388041C2 |
| PULSE COUNTER | 2010 |
|
RU2419200C1 |
| METHOD AND DEVICE FOR SUBTRACTING BINARY CODES | 2010 |
|
RU2410746C1 |
| METHOD AND APPARATUS FOR MULTIPLYING BINARY CODED DECIMAL | 2009 |
|
RU2410745C1 |
| DEVICE FOR ADDING BINARY CODES | 2008 |
|
RU2381547C2 |
| METHOD AND DEVICE FOR ADDING | 2005 |
|
RU2308073C2 |
