FIELD: physics, computer engineering.
SUBSTANCE: invention relates to digital computer engineering and can be used in computer processors and digital automation devices. The method involves successively performing operations of receiving multipliers in tetrads TA1 and TB3, converting multiplier codes from code 8, 4, 2, 1 to decimal numbers 8, 6, 4, 2, 1, multiplying even decimal numbers of tetrads TA1 and TA3 of one decimal place using a multiplication matrix, adding partial values of the product between TC2 and the number of unit digits and multiplication tens digits, adding the number TC2 to the decimal numbers TB3, TA2 using an addition matrix. The apparatus which realises said method has in each decimal place AND elements, OR elements, digital inverters, three four-bit flip-flop registers A, B, C, one-bit three-input adder, a multiplication matrix, an addition matrix, six control inputs.
EFFECT: faster multiplication operations.
2 cl, 3 dwg, 2 tbl
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Authors
Dates
2011-01-27—Published
2009-07-06—Filed