FIELD: information technology.
SUBSTANCE: in a device for controlling access to memory in a computer system at least with two execution units there is buffer memory, specifically cache memory, as well as switching apparatus and comparison apparatus, whereby switching is carried out between a high-efficiency mode and a comparison mode. In the comparison mode, access to buffer memory is closed for all execution units and in the high-efficiency mode access to buffer memory is open to at least one execution unit.
EFFECT: possibility of switching in a switched multiprocessor system between a high-efficiency mode and a comparison mode.
13 cl, 8 dwg
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Authors
Dates
2010-12-10—Published
2006-07-24—Filed