FIELD: information technology.
SUBSTANCE: device has latch consisting of an nMOSFET pair in which the first and second nMOSFET are cross-coupled, and a pMOSFET pair in which the first and second pMOSFET are cross-coupled; a first pMOSFET switch, connected to the latch and having a drain, a source and a gate; a second pMOSFET switch, connected to the latch and having a drain, a source and a gate; two pre-charging nMOSFET transistors which can provide low impedance between the logic-zero level and the latch; a pMOSFET which can provide low impedance between Vcc and pMOSFET sources of the latch; an inverter with a pre-charging circuit consisting of series-connected first nMOSFET controlled by a bit line, and a second nMOSFET in diode ON, where the second nMOSFET of the inverter connects the zero logic level and the source of the first nMOSFET of the inverter, and the drain of the first nMOSFET of the inverter is pre-charged and is connected to a data line through a switch or through a multiplexer.
EFFECT: high synchronisation of output signals and faster operation owing to prevention of generation of additional differential signals.
2 cl, 4 dwg
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Authors
Dates
2011-02-27—Published
2009-09-09—Filed