FIELD: information technology.
SUBSTANCE: in one version of the invention, the i-th bit of the functional structure of the adder is in form of positive and conditionally negative summation channels. Each channel has elements which execute logic functions AND, OR, NOR, NAND and NOT.
EFFECT: faster process of converting arguments.
4 cl
Authors
Dates
2011-08-20—Published
2009-11-10—Filed