FIELD: information technology.
SUBSTANCE: first and second intermediate sums are formed using logic elements OR and AND, and the next process for converting arguments is performed in two steps, the first step involving end-to-end activation of inactive arguments of the second intermediate sum with subsequent Boolean differentiation of only positive resultant arguments and the conditionally negative argument of that procedure is included in the structure of conditionally negative arguments of the result of end-to-end activation of inactive arguments of the second intermediate sum, through which the corresponding active arguments in the structure of the first intermediate sum are removed; a third position-sign intermediate sum is generated, in which the next inactive arguments are activated after the first active conditionally negative argument in the least bit and a fourth intermediate sum is generated for the second step for converting arguments, in which conditionally negative arguments undergo Boolean differentiation to generate only a positive argument of that procedure and then included in the resultant structure of arguments of the sum, where at the second step for converting arguments, arguments of the second intermediate sum undergo Boolean differentiation and the positive argument for local transfer of this procedure enables to avoid activation of inactive arguments of the third intermediate sum, and the conditionally negative argument for local transfer of this procedure from the resultant structure of arguments of the sum enable to exclude the active positive argument of the third intermediate sum and the resultant sum of analogue signals is generated in position format.
EFFECT: faster summation.
