SHIFT REGISTER, DISPLAY CONTROL CIRCUIT, VISUALISATION PANEL AND VISUALISATION DEVICE Russian patent published in 2013 - IPC G09G3/36 

FIELD: electrical engineering.

SUBSTANCE: shift register is intended for usage in a display control circuit that simultaneously selects signal lines. The shift register cascade includes: a trigger (FF) including an initialisation output (INITB) and a signal generation circuit that receive simultaneous selection signal (AONB signal) and generates the cascade output signal (OUTB) using the trigger output signal (Q, QB). In the trigger, the cascade output signal (OUTB) becomes active as a results of the simultaneous selection signal activation, remaining active throughout the simultaneous selection period. The output signal (Q, QB) of the trigger (FF) remains inactive while the initialisation output (INITB), the setup output (SB), the trigger reset output (R) and the trigger initialisation output (INTTB) receive simultaneous selection signal (AONB signal).

EFFECT: reduction of varied control circuits size.

29 cl, 34 dwg