ERROR DETECTING AND CORRECTING DEVICE WITH MEMORY SELF-TESTING FUNCTION Russian patent published in 2013 - IPC G06F11/10 G06F12/00 

FIELD: information technology.

SUBSTANCE: error detecting and correcting device with a memory self-testing function, which includes second layer cache memory, having four tag memory and data sections, a logic unit for noiseless coding and decoding, is provided with a self-testing unit with a status register, a port for accessing test logic, a unit for generating a test sequence, address and data generators, an operating mode selecting unit, an additional coding unit, having independent encoders, a decoding unit, having independent decoders, a check bit control unit connected to tags of each section for independent and parallel checking of each section of cache memory through the self-testing function, wherein the status register of the self-testing unit is connected to the decoding unit and the port for accessing test logic, and the data generator and address generator are connected to the operating mode selecting unit.

EFFECT: faster operating mode of the memory data transfer channel owing to simultaneous determination of multiple one-fold errors in tags of different sections.

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