FIELD: information technology.
SUBSTANCE: shift register includes one or more cascade connection circuits, in each of which bits are connected to each other by a stage to enable transmission of a shift pulse, wherein at least one of said one or more cascade connection circuits includes among its bits a group of successive bits, and each bit of the group of successive bits includes: a first output transistor, a second output transistor, a first capacitor, a second capacitor, an input rectifier diode, a first switching element, a second switching element, a third switching element, a fourth switching element and a fifth switching element.
EFFECT: suppressing noise of each bit output without increasing the size of the circuit.
11 cl, 16 dwg
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Authors
Dates
2013-09-20—Published
2010-02-22—Filed