FIELD: physics, computer engineering.
SUBSTANCE: invention relates to computer engineering. A shift register includes a plurality of bistable circuits connected in series to each other, having a first state and a second state, the bistable circuits being sequentially switched to the first state based on at least four-phase clock signals including two-phase clock signals, which are provided as a first clock signal a second clock signal in the bistable circuits of an odd-order stage from the plurality of bistable circuits, and two-phase clock signals which are provided as a first clock signal a second clock signal in the bistable circuits of an even-order stage from the plurality of bistable circuits, wherein each bistable circuit includes: an output node; an output control switching element; first and second charge units for changing the first node.
EFFECT: enabling switching of the scanning order of a scanning signal line without increasing the area of the circuit, current consumption and insufficient charge of the pixel capacitance.
25 cl, 30 dwg
