PHOTODETECTOR MATRIX READER CELL WITH ANALOGUE-TO-DIGITAL CONVERSION Russian patent published in 2015 - IPC H01L27/14 

Abstract RU 2554646 C1

FIELD: physics.

SUBSTANCE: photodetector matrix reader cell with analogue-to-digital conversion comprises an input unit, an integrating capacitor with one of the plates shorted on the earth, a counter, a Schmitt trigger and a shift register. The counter is m-bit and does not have a reset. The input unit consists of three field-effect transistors. The first transistor, designed to stop the count, is enables a potential equal in magnitude to the supply voltage of the analogue part to be applied at its source, and a count stopping signal to be transmitted at the gate. The drain of the first transistor is connected to the source of the second transistor, which is designed to charge the integrating capacitor. The drain of the second transistor is connected to the second plate of the integrating capacitor and the gate is connected to the first output of the Schmitt trigger and the second input of the m-bit counter. The third transistor is designed to set a photodiode bias and is configured to use its gate as the input for setting a subthreshold transistor mode and connect its source to the photodiode. The drain of the third transistor is connected to the drain of the second transistor, the second plate of the integrating capacitor and the input of the Schmitt trigger. The input of the Schmitt trigger is also connected to the drain of the second transistor and the second plate of the integrating capacitor. The first output of the Schmitt trigger is connected to the second input of the m-bit counter, and the second output of the Schmitt trigger is connected to the first input of the m-bit counter. The output of the m-bit counter is connected by an m-bit data bus to the m-bit input of the shift register. The shift register also has an input designed to connect to the output of the shift register of the previous cell, an input for feeding a signal for loading a number from the counter into the shift register, an input for feeding a signal for reading information from the shift register and an input for feeding an inverted signal for reading information from the shift register. The output of the shift register is designed to connect to the input of the shift register of the next cell.

EFFECT: low power consumption, fewer control signals, implementing serial, simple output of data and miniaturisation.

7 cl, 8 dwg

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RU 2 554 646 C1

Authors

Zverev Aleksej Viktorovich

Makarov Jurij Sergeevich

Dates

2015-06-27Published

2014-02-20Filed