FIELD: physics, computer engineering.
SUBSTANCE: invention relates to computer engineering. The static memory cell with two address inputs based on MOS transistors consists of a flip flop, two selection switches and an AND logic element which controls the switches, wherein the flip flop consists of first and second n-channel MOS transistors and third and fourth p-channel MOS transistors, and has an additional common bus for flip flops which is connected to sources of the first and second MOS transistors, wherein the potential of the common bus for flip flops is higher than that of the common bus of the cell.
EFFECT: high noise-immunity.
3 dwg
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