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2 530 271

(13)

(51)

IPC

G11C19/28(2006-01-01)

(21) (22)

Application

2013132041/08, 2013-07-10

(24)

Start date

2013-07-10

(22)

Actual filing date

2013-07-10

(45)

Published

2014-10-10

(72)

Inventor

Dem'Janenko Mikhail AlekseevichEsaev Dmitrij GeorgievichKozlov Aleksandr IvanovichMarchishin Igor' VladimirovichOvsjuk Viktor NikolaevichFilippova Valerija Viktorovna

(73)

Holder

Federal'Noe Gosudarstvennoe Bjudzhetnoe Uchrezhdenie Nauki Institut Fiziki Poluprovodnikov Im. A.V. Rzhanova Sibirskogo Otdelenija Rossijskoj Akademii Nauk So Ran)

SHIFT REGISTER (VARIANTS) Russian patent published in 2014 - IPC G11C19/28

Abstract RU 2530271 C1

FIELD: electricity.

SUBSTANCE: the device comprises cells, and each cell consists of switching and informative metal-insulator-semiconductor FETs of n-type, switching and informative metal-insulator-semiconductor FETs of p-type, a power supply bus, zero potential bus, a clock bus.

EFFECT: ensuring bidirectional transmission of the shift register, increasing stability in conditions of essential parasitic capacitance of clock buses, minimization of the required IC chip area.

3 cl, 9 dwg

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RU 2 530 271 C1

Authors

Dem'Janenko Mikhail Alekseevich

Esaev Dmitrij Georgievich

Kozlov Aleksandr Ivanovich

Marchishin Igor' Vladimirovich

Ovsjuk Viktor Nikolaevich

Filippova Valerija Viktorovna

Dates

2014-10-10—Published

2013-07-10—Filed