OUTPUT CASCADE FOR CMOS CHIPS WITH DEVICE FOR PROTECTION AGAINST ELECTROSTATIC DISCHARGES Russian patent published in 2015 - IPC H03K17/08 

FIELD: electricity.

SUBSTANCE: output cascade with the device for protection against electrostatic discharges (ESD) in addition contains two negative OR gates and negative AND gates, two output transistors, two control transistors, and one of them, control n-channel transistor is connected by the source to the output bus, by the gate - to the earth bus, and by the drain - to the gate of the output p-channel transistor, in turn, another control p-channel transistor is connected by the source to the output bus, by the gate - to the power supply bus, and by the drain - to the gate of the output n-channel transistor, and also the gate of the key n-channel transistor is connected to the input of negative AND gate, and the gate of the key p-channel transistor is connected to the input of negative OR gate.

EFFECT: increase of speed of the output cascade.

1 dwg