FIELD: electrical engineering.
SUBSTANCE: invention relates to semiconductor industry, in particular, to integrated microcircuits and can be used for protection against static electricity discharges outputs and power buses crystals of complementary MOS microchips manufactured on silicon plates of n-type conductivity, in particular on EFC-4.5 plates. Device for protection against static electricity discharges power leads of complementary MOS (metal-oxide-semiconductor) integrated circuits on silicon plates with n-type conductivity includes output contact site (1) of negative supply (-Ep) connected to electrodes of internal circuit (10), cathode of first diode (7) and anode of second diode (9), cathode of which is connected to output of contact pad (2) of earth (▼) or positive power supply, which is connected to electrodes of internal circuit (10), wherein according to invention device contains MOS transistor (5), which substrate electrode is formed by "p-Pocket", connected to anode of first diode (7), gate of MOS transistor (5), which is upper armature of capacitor (3) to earth bus and output of contact pad (2), connected via high-resistance resistor (8) to anode of first diode (7), first drain-source electrode of MOS transistor (5) through low-value resistor (4) is connected to output of contact pad (2), second source-stock electrode of MOS transistor (5) through low-value resistor (6) is connected to output contact site (1) and electrodes of internal circuit (10).
EFFECT: technical result consists in avoiding occurrence of high potential difference (more than 15 V) between buses of power supplies and earth and provides fast passage of current (of more than 2 ampere) without damaging gate dielectric protective shunting transistor when exposed to static electric discharge to 3,500 V, at that current circuits shall have minimum possible resistance.
7 cl, 3 dwg
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