FIELD: electricity.
SUBSTANCE: cell of static random access memory comprises a group of four n-MOS transistors including the first, second, third and fourth triggers, a group of four p-MOS transistors including the first, second, third and fourth triggers, the first and second bit record pass transistors, the first and second bit inversion pass transistors, a supply voltage input, a Zero Volt input, a bit value input, a bit inversion value input, a record input, a data output, at that the cell includes additionally the second group of four n-MOS transistors, the second group of four p-MOS transistors, the third and fourth bit record pass transistors, the third and fourth bit inversion pass transistors, the second inverse data output.
EFFECT: fail-safety improvement in regard to the irreversible failure of the transistors.
5 dwg, 1 tbl
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Authors
Dates
2016-01-20—Published
2014-03-21—Filed