FERROELECTRIC ELEMENT OF MEMORY AND SUMMATOR Russian patent published in 2018 - IPC G11C11/22 

Abstract RU 2668716 C2

FIELD: computer equipment.

SUBSTANCE: invention relates to computer engineering. Memory element comprises a ferroelectric layer, conductive layers on both sides of it and recording and reading means including a MIS transistor, the ferroelectric layer is made of solid or of separate parts, on the one side of the ferroelectric layer a solid conducting layer is made-a common electrode in the form of a floating gate of a MIS transistor, on the other side of the ferroelectric layer, a conductive layer is made in the form of two or more non-overlapping parts, recording electrodes on top of which an electrically insulated and overlapping region of the MIS transistor channel is a solid conductive layer, the readout electrode.

EFFECT: technical result consists in creating a reliable ferroelectric memory element with a discrete set of possible states of more than two.

5 cl, 3 dwg

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RU 2 668 716 C2

Authors

Abduev Marat Khadzhi-Muratovich

Zarubin Igor Mikhajlovich

Kovalev Anatolij Andreevich

Dates

2018-10-02Published

2017-10-23Filed