FIELD: physics.
SUBSTANCE: invention relates to memory synchronization tools in a multi-core system. System comprises: assignment module for assigning at least one memory partition to at least one processor core in a multi-core system; mapping module for providing information for disabling the fast address translation buffer in a multi-core system by transmitting an interrupt command to at least one core in a multi-core system, if the page table entry associated with the memory section assigned to this at least one processor core has been modified; and interface module for creating a user-space interface with a destination module.
EFFECT: technical result is an expansion of the arsenal of memory synchronization tools in a multi-core system.
15 cl, 5 dwg
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