COMPENSATOR VOLTAGE STABILIZER Russian patent published in 2019 - IPC G05F1/56 

Abstract RU 2683249 C1

FIELD: physics.

SUBSTANCE: invention relates to secondary power sources and can be used in structure of systems on a chip (SoC). Technical result allows arrangement of compensating voltage stabilizer (CVS) on substrate of SoC, and also reduction of time of transient process in CVS at switching of reference voltage source by means of digital control system. Compensation voltage stabilizer comprises input (1) power bus, device output (2), to which load circuit (3) is connected, control element (4), current output of which (5) is connected to device (2) output, low-ohm input (6) of control element (4) is connected to input (1) power bus, and control input (7) is connected to output of current mirror (8) matched with input (1) power bus, and also to first (9) correcting capacitor and first (10) current output of differential error signal amplifier (11), input of current mirror (8), connected to second (12) current output of differential error signal amplifier (11), first (13) current-stabilizing two-terminal device connected between integrated emitter circuit of transistors (14) of differential error signal amplifier (11) and common bus of power supply (15), wherein first (16) input of the differential error signal amplifier (11) is connected to the reference voltage source (17), and device output (2) is connected to second (18) input of the differential error signal amplifier (11). An additional transistor (19) is introduced into the circuit, the base of which is connected to second (18) input of the differential error signal amplifier (11), collector is connected to common bus of power supply (15), and emitter is connected to input (1) power bus through second (20) current-stabilizing bipolar, wherein emitter of first (19) additional transistor is connected to combined emitter circuit of transistors (14) of differential error signal amplifier (11) through second (21) correcting capacitor.

EFFECT: reduced amplitude of "dips" and "outbursts" of output voltage CVS at pulse load currents, for a case when numerical values of capacitors of used capacitors are relatively low.

4 cl, 9 dwg

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RU 2 683 249 C1

Authors

Ignashin Andrej Alekseevich

Prokopenko Nikolaj Nikolaevich

Serebryakov Aleksandr Igorevich

Dates

2019-03-27Published

2018-06-28Filed