FIELD: calculating; counting.
SUBSTANCE: invention relates to the computer equipment. Random access memory cell comprises three series-connected inverters, a first passkey data recording made of two series-connected transistors, a recorded data acknowledgment circuit in form of two parallel-connected complementary through switches, one of which is connected to direct and inverse inputs of address bus, and other is connected to direct and inverse inputs of column selection bus; wherein one output of the third inverter is connected to the first output bit line through the second complementary through switch connected to the first and second data reading bus direct and inverse inputs, and the other output of the third inverter is connected to the second output bit line through a third complementary output key connected to the forward and inverse inputs of the second address data reading bus.
EFFECT: technical result consists in increasing range of output voltage of cell to level of supply voltage while maintaining high failure stability.
1 cl, 1 dwg
Title | Year | Author | Number |
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|
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STORAGE FOR ONE-LINE MEMORY | 0 |
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SU1376118A1 |
FIXED STORAGE DEVICE | 0 |
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SU841047A1 |
ASSOCIATIVE STORAGE | 0 |
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READING DEVICE FOR MULTI-ELEMENT INFRARED PHOTODETECTORS | 2016 |
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RU2645428C1 |
READ ONLY MEMORY (ROM) | 0 |
|
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RAPID-ACCESS STORAGE BASED ON MDS-TRANSISTORS | 0 |
|
SU744726A1 |
MEMORY UNIT | 0 |
|
SU1786508A1 |
Authors
Dates
2019-05-21—Published
2018-06-19—Filed