MEMORY CELL OF STATIC STORAGE DEVICE Russian patent published in 2014 - IPC G11C11/40 

FIELD: information technology.

SUBSTANCE: memory cell of static random access memory (RAM) has three series-connected CMOS inverters connected between a supply bus and an earth bus; a first transmission gate consisting of two series-connected address transistors whose gates are connected to a write address bus and a column selection address bus; a second transmission gate in form of an address transistor whose gate is connected to the read address bus; a written data acknowledgement circuit consisting of two parallel-connected complementary transmission gates, one of which is connected to non-inverting and inverting inputs of the write address bus, and the other to the non-inverting and inverting inputs of the column selection address bus. The input of the first CMOS inverter is connected through the first transmission gate to a first bit line; the output of the first CMOS inverter is connected to the input of the second CMOS inverter; the output of the second CMOS inverter is connected to the input of a third inverter and through the written data acknowledgement circuit to the input of the first CMOS inverter; the output of the third CMOS inverter is connected through the second transmission gate to a second bit line.

EFFECT: high reliability and fault-tolerance of random access memory.

2 cl, 1 dwg