METHOD FOR INDIRECT MEASUREMENT OF FAULT TOLERANCE OF IRRADIATED TEST DIGITAL MICROCIRCUITS, BUILT BY METHOD FOR CONSTANT REDUNDANCY, AND FUNCTIONAL STRUCTURE OF TEST MICROCIRCUIT INTENDED FOR IMPLEMENTATION OF THIS METHOD Russian patent published in 2021 - IPC G06F11/07 

FIELD: computer technology.

SUBSTANCE: inventions group relates to the field of computer technology and electronics and can be used to build digital microcircuits, fault-tolerant to radiation. The functional structure of the test digital microcircuit contains an input n-bit binary register, an output n-bit binary register, a control unit for receiving an n-bit binary code of a control standard into an input register, a control unit for receiving a code of the result of the operation of a microcircuit into an output register. To implement majority redundancy, k-fold redundant nodes are installed in the microcircuit. A majority valve is installed at the outlet of each unit. At the k inputs of the majority valve, respectively, k identical redundant blocks are installed. Each of the blocks contains a chain of single-input combinational logic gates.

EFFECT: provides indirect measurement of fault tolerance of irradiated test digital microcircuits, built by the method for permanent majority reservation.

7 cl, 2 dwg