ADDER-MULTIPLIER MODULO THREE Russian patent published in 2021 - IPC G06F7/72 

FIELD: computing technology.

SUBSTANCE: invention relates to an adder-multiplier modulo three. The device contains three AND gates, six OR gates and four exclusive OR gates, and the first and second inputs of the third AND gates are connected, respectively, to the outputs of the third, fourth OR gates, characterized in that the seventh OR gates are inserted into it, the j-th () input the third and first inputs of the fourth OR elements are connected, respectively, to the third input of the j-th element OR, the second input of the j-th element, exclusive OR, and the second input of the first OR element, the second input of the fourth and the first, the second inputs of the (j + 5)- th elements OR are connected, respectively, with the first input of the j-th element exclusive OR, the second input of the second OR element and the output of the j-th element AND, the output of the (j+2) -th an exclusive OR element, the second, third inputs of the j-th element AND and the first, second inputs of the (j+2)-th element exclusive OR are connected, respectively, with the output of the j-th element exclusive OR, the output of the third AND element and the outputs of the j-th, fifth OR elements, and the second input of the fifth, first, second inputs of the (j+2)- th and output of the (j+5)-th elements OR are connected, respectively, with the output of the third element AND, (2×j-1)-th, (2×j)-th inputs and j-th output of the adder-multiplier modulo three, the tuning input of which is connected to the first input of the fifth OR element and the first inputs of the j-th OR, AND elements.

EFFECT: simplifying the device construction.

1 cl, 1 dwg,1 tbl