FIELD: computer technology.
SUBSTANCE: parallel adder-subtractor based on neuron-like elements, containing a number input unit, a comparison unit and a unit of parallel adders-subtractors, with the following additionally introduced: a unit register of the first number, a unit register of the second number and a result block register, and the first information output of the input unit numbers, the second information output of the number input unit on which a binary code is generated and the sign bit of the second input number is connected to the second information input of the comparison unit, the first information output of the comparison unit on which a binary code is generated and the sign bit of a larger absolute number is connected to the first information input of the adder-subtractor unit, the control input of the adder-subtractor unit, on which the sign of the operation, the summation or subtraction signal, is formed, is connected to the control output of the comparison unit, the second information output of the comparison unit, on which a binary code of a smaller absolute number is generated, is connected to the second information input of the adder-subtractor unit.
EFFECT: increasing the speed of operations and increasing reliability.
1 cl, 7 dwg
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