FIELD: information technology.
SUBSTANCE: invention relates to information and computer engineering equipment and can be used for synthesis of arithmetic logic units for designing high-speed and efficient digital devices for summation and subtraction of numbers in a ternary number system in direct codes. The device has a number input and encryption unit, an adder unit, a first number register unit, a second number register unit, a result register unit and a control unit.
EFFECT: reduced hardware expenses, simple combinational circuit and simple algorithm of operation of the device.
18 dwg, 10 tbl
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Authors
Dates
2012-06-20—Published
2010-03-04—Filed