FIELD: physics.
SUBSTANCE: invention relates to redundant memory with error correction in duplicated channels. Said result is achieved by coding initial binary information based on an algebraic linear code using two check bits, which reduces hardware costs associated with storing check bit values. Correction of occurring errors is provided by formation of an error vector based on bitwise summation by modulus of two values of information bits coming from information outputs of the main and backup memory units.
EFFECT: reducing hardware costs associated with designing a monitoring device for detecting single and double errors in duplicate channels and increasing fault tolerance of the redundant device due to correction of errors.
1 cl, 1 dwg
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