FIELD: physics.
SUBSTANCE: invention relates to computer devices and is used in designing neuromorphic processors. Essence of the proposed device is as follows. Conveyor multiplier comprises an intermediate value generator configured to receive a first and a second operand and capable of generating intermediate multiplication results, a three-layer conveyor for convolution of intermediate values of the Wallace tree type for addition of the obtained intermediate values and obtaining a multiplication result, a multiplexer for selecting a multiplication or combined multiplication-addition operation with a third operand. Capacity of the input operands of multiplier is 16 bits, the capacity of the result of operation is 32 bits, and the capacity of the third operand for the MAC operation is 32 bits. At the same time units on clock signal are made so that each next unit operates on inverse edge of clock signal relative to the previous one; generator of intermediate values is based on a modified Booth algorithm, in which parallel generation of all versions of intermediate values in half a cycle is realized.
EFFECT: faster operation of the device.
5 cl, 15 dwg
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Authors
Dates
2024-10-01—Published
2024-02-27—Filed