METHOD OF DIVIDING CONVOLUTION OPERATION ON DEVICE WITH MATRIX MULTIPLIERS BASED ON SYSTOLIC ARRAYS Russian patent published in 2024 - IPC G06F17/16 G06F12/02 

FIELD: computer engineering.

SUBSTANCE: invention relates to methods of organizing parallel computer calculations. Result is achieved by performing a method comprising steps of: obtaining input data tensors and input weights from high-throughput memory; separating tensors of input data and weights into several parts; required amount of matrix memory is reserved; alternately loading parts of input data from high-throughput memory into vector memory; dividing parts of the input data into several sub-parts taking into account the reserved amount of memory and loading the sub-parts into the memory; alternately loading parts of weights into memory, wherein loading parts of weights into memory is carried out in parallel with loading of sub-parts of input data; processing the input data and weights read from the matrix memory, as a result of which sub-parts of the resultant tensor are obtained; parts of the resultant tensor are loaded into high-throughput memory in parallel with processing of the next sub-parts of the input data and parts of the weights by at least one matrix multiplier based on systolic arrays.

EFFECT: improving the performance of the tiling process of the convolution operation.

6 cl, 2 dwg