MATRIX COMPUTATION DEVICE Russian patent published in 2025 - IPC G06F17/16 

FIELD: physics.

SUBSTANCE: disclosed engineering solution generally relates to microprocessors and particularly to a matrix computing device. Result is achieved due to implementation of matrix calculations device arranged on chip, comprising: a unit for dividing configuration packets, connected to an external control device, configured to receive, separate and control the execution of configuration packets; memory configured to receive, from at least the external memory and/or the vector processor memory, matrices-operands, their storage and transmission to the matrix multiplication unit based on the received configuration packets; combination unit configured to obtain a plurality of scalar vector elements from the memory of the vector processor, combine said elements into a vector and transmit said vector to the memory; matrix multiplication unit configured to multiply the operand matrices based on the obtained configuration packet, including: a systolic array configured to calculate the sum of the products of elements of the operand matrices; matrices-operand elements delay unit, configured to synchronize calculations within systolic array; buffer memory coupled to the external device, configured to store the calculation results from the systolic array; local control unit configured to control the order of transmitting elements of the matrix operands to the systolic array and control data transmission from the systolic array to the external device.

EFFECT: reduced power consumption of the matrix computing device due to smaller area of the device.

14 cl, 3 dwg